SKILLS • Networking: algorithms, protocols, H/W components, QoS, WLAN, AD-HOC
• Microprocessor architectures, SoC, NoC, mobile modem architecture
• Asynchronous logic and interconnection, power reduction
• HW projects supervision
• VHDL, SystemVerilog, Verilog, SystemC, Vera
• C, C++, various assemblers
• PCIe, Gigabit Ethernet, IPv4, IPv6, Infiniband, CDMA2000, MPE-FEC (DVB-H)
• XILINX FPGA family, embedded PPC
• Modelsim (Windows, Unix), Scirocco, Active-HDL
EDUCATION 2002 - 2005 Technion - Israel Institute of Technology Haifa, Israel
Master of Science (M. Sc.) in Electrical Engineering
Thesis title: Hardware Based QoS Connection Establishment Mechanism
Supervisor: Prof. Israel Cidon (Head of Jacobs Center of Information and Communication Technologies - Technion; CTO for Viola Networks) 1996 - 2000 Technion - Israel Institute of Technology Haifa, Israel
Bachelor of Science (B. Sc.) in Electrical Engineering
Specialized in Computer Networks, Computers (SW, HW) and Communications
EXPERIENCE 2/2007 - now SURF Communication Solutions Yokneam, Israel
FPGA Designer and Verification Leader
• System level (HW/SW) design, integration and validation of FPGA-based multiple DSP (TI) integrated solution for video streaming and telecommunication
• Design, implementation and integration of various high speed communication components e.g., PCIe DMA, IPv6 routing logic
• Experience with PCIe, Gigabit Ethernet and custom high-speed SoC interconnection
• SystemVerilog based verification initiator and leader 2004 - 2007 Qualcomm Haifa, Israel
ASIC Designer and Verification Engineer
• Design and implementation in VHDL various audio algorithms and MPE-FEC to IP decapsulation machinery
• Low-cost cellular modem modifications
• Chip level integration and verification using Vera
• Block level verification using C, VHDL and Vera2000 - 2006 VLSI lab, EE, Technion - Israel Institute of Technology Haifa, Israel
Project Supervisor and Lab. Supervisor
• Project invention and supervision
• Laboratory SystemC experiments supervision2003 - 2004 HS-DSL lab, EE, Technion - Israel Institute of Technology Haifa, Israel
System Engineer and VHDL Expert
• VIRTEX-2Pro based PCIe Traffic Generator/Analyzer (HW/SW)
• High Speed Data Channels experiment implementation (in cooperation with Intel)
• Satellite Camera Project (in cooperation with Israeli Ministry of Defense)
• Project invention and supervision
• VHDL workshop responsible
• VHDL laboratory expert and student advisor2000 - 2003 IBM, Haifa Design Lab. Haifa, Israel
ASIC Designer
• Design and implementation a complex network component (Infiniband switch)
• System verification using direct tests and regressions
• Solution bring up leader
• Student supervision on formal verification
• System improvements and redesign